As electronic equipment becomes more compact, lightweight, and high-performance, flip chip mounting is becoming more widespread as a method for mounting LSI (Large Scale Integrated circuit) chips and other semiconductor elements to a wiring board. Flip chip mounting is a mounting method in which bumps are formed on the surface of a wiring pattern of a semiconductor element, and the bumps are joined to the electrodes of the wiring board.
FIGS. 7A to 7D are cross-sectional views showing the manufacturing steps a conventional method of manufacturing a semiconductor device. First, a wiring board 1 and a semiconductor element 2 are prepared, as shown in FIG. 7A. A plurality of electrode pads 5 are formed on one of the surfaces of the wiring board 1, and a solder resist 7 is disposed in the peripheral area of the electrode pads 5 on the surface of the wiring board 1. Also, a plurality of electrodes 4 are formed on one of the surfaces of the semiconductor element 2. Bumps 3 are formed on the electrodes 4 of the semiconductor element 2 and on the electrode pads 5 of the wiring board 1. Flux 8 is deposited on the surface on which the electrode pads 5 are formed in the wiring board 1. The flux 8 is deposited so as to cover the electrode pads 5 and the bumps 3 formed on the electrode pads 5. In this case, the flux 8 is occasionally deposited at the distal end of the bumps 3 formed on the semiconductor element 2.
Next, the semiconductor element 2 is positioned on the wiring board 1 so that the bumps 3 formed on the semiconductor element 2 are in contact with the bumps 3 formed on the wiring board 1, and the bumps 3 are reflowed to fuse and solidify them together, as shown in FIG. 7B. The bumps 3 on the semiconductor element 2 and the bumps 3 on the wiring board 1, which are in mutual contact, are thereby integrated, and the electrodes 4 of the semiconductor element 2 are connected to the electrode pads 5 of the wiring board 1 by way of the bumps 3.
Next, the mounted article in which the semiconductor element 2 is mounted on the wiring board 1 is washed and the flux 8 is removed, as shown in FIG. 7C. Resin material in the form of a liquid is caused to permeate and fill the gap between the wiring board 1 and semiconductor element 2 with the aid of the capillary effect, as shown in FIG. 7D. In this case, resin material is deposited on the periphery of the semiconductor element 2 and in the gap on the wiring board 1. The resin material is cured by heating, and an underfill resin 6 is formed between and on the periphery of the wring substrate 1 and the semiconductor element 2, as well as on the periphery of the semiconductor element 2. A semiconductor device is thereby fabricated.
In such a semiconductor device, high connection reliability is required in the connection portion between the wiring board and the semiconductor element. In other words, a semiconductor element must be stably connected to the wiring board over a long period time without damaging the connection. For this reason, a resin material is sufficiently filled and cured to form an underfill resin in the gap between the semiconductor element and wiring board to thereby protect the connection portion between the semiconductor element and the wiring board. The physical properties of the underfill resin, such as the modulus of elasticity and the coefficient of thermal expansion, must be improved, and stress applied to the connection portion, which is one form of thermal stress caused by the difference in the coefficient of thermal expansion between the semiconductor element and wiring board, must be reduced. However, the size of LSIs is currently being increased in conjunction with demands for higher LSI performance. As a result, the effect of heat stress generated between the semiconductor element and the wiring board is further magnified. For this reason, sufficient connection reliability cannot be obtained without further improving the physical properties of the underfill resin.
This type of problem can be solved by including, for example, a large amount of filler in the underfill resin, and ensuring a higher modulus of elasticity and a lower coefficient of thermal expansion in the underfill resin. However, since the viscosity of the resin material increases prior to curing when a filler is included, a problem occurs in which the resin material cannot be sufficiently filled in the gap between the semiconductor element and wiring board. Also, even if the resin material can be sufficiently filled into the gap, the bumps, electrodes, and electrode pads are plastically deformed by heat stress generated when the device operates or at other times in cases in which, for example, voids are produced in the gap between the semiconductor element and wiring board, or at other times, and there is a risk that adjacent bumps will occasionally become connected via the voids to form a short circuit.
Thus, there are difficult problems in that the modulus of elasticity, the coefficient of thermal expansion, and other physical properties of the underfill resin, and the gap filling characteristics of the resin materials must all be kept at the desired level in order to improve the connection reliability of a semiconductor device. The above-described problems are predicted to become more significant because the filling distance that the resin material must penetrate is increased and the gap between the semiconductor element and wiring board becomes narrower as the size of LSI increases and the pitch is reduced.
In view of the above, a mounting method has been proposed in response to such problems. In this method, solder connections are formed and resin is cured by applying a resin material for forming an underfill resin in advance on the wiring board, mounting the semiconductor element on the wiring board, and thereafter performing heat treatment (refer to Patent Document 1, for example). FIGS. 8A to 8C are cross-sectional views showing the order of the steps of this conventional method for manufacturing a semiconductor device. First, bumps 3 are formed on the electrodes 4 of the semiconductor element 2 as a pre-step for mounting the semiconductor element 2 on the wiring board 1, as shown in FIG. 8A. Electrode pads 5 are formed on the surface of the wiring board 1, and a solder resist 7 is disposed on the periphery of the electrode pads 5.
The wiring board 1 is mounted on a stage (not shown), the surface of the side on which the semiconductor element 2 is mounted on the wiring board 1 is set facing upward, and resin material 6a for forming an underfill resin is applied on this surface in an amount that sufficiently fills the area between the semiconductor element and wiring board when the semiconductor element 2 is mounted on the wiring board 1, as shown in FIG. 8B.
Next, a bonding tool (not shown) is attached to the semiconductor element 2, the surface on which the electrodes 4 are formed is held so that it faces downward, and the semiconductor element 2 is positioned on the wiring board 1, as shown in FIG. 8C. The semiconductor element 2 is pressed to the wiring board 1 so that the bumps 3 displace the resin material 6a and make contact with the electrode pads 5. The semiconductor element 2 is heated by using a heater or another heating means provided to the bonding tool to which the semiconductor element 2 is attached, the wiring board 1 is heated by using a heater or another heating means provided to the stage on which the wiring board 1 is mounted, the bumps 3 are reflowed to connect the electrodes 4 of the semiconductor element 2 and the electrode pads 5 of the wiring board 1 by way of the bumps 3, and the resin material 6a is heat cured to form an underfill resin 6. Mounting of the semiconductor element 2 is thereby completed.
[Patent Document 1] Japanese Laid-open Patent Application No. 2001-332583